The present invention relates to a compound semiconductor device, and more particularly to, a device which provides a single chip by forming a heterojunction bipolar transistor (HBT) into the vertical structure of a laser diode.
Recently, the necessity for high speed computers, high frequency, and optical communication has increased according to the developments of an information communication society. However, conventional Si devices have limits in satisfying such needs. Thus, compound semiconductors which have superior material properties have been extensively investigated.
Among the compound semiconductors, GaAs has high operation speed and low power consumption due to its high electron mobility and semi-insulating property, thereby having many advantages for military or space communication.
By using such superior material properties of GaAs, various devices have been developed. As typical devices, there are the laser diode (LD), the metal-semiconductor field effect transistor (MESFET), heterojunction bipolar transistor (HBT), and the delta-doped field effect transistor (.delta.-doped FET).
The LD emits light by recombining an electron with a hole in the gain medium of a P-N junction when a sufficient forward current flows. Since the LD is small and provides the coherent light, it is widely used as a light source in optical communication and optical signal processing.
On the other hand, the HBT utilizes the heterojunction of an emitter with a large energy bandgap and a base with a small energy bandgap. Then the hole injection from the base to the emitter is prevented and the electron injection from the emitter to the base becomes easier, increasing the electron injection efficiency of the emitter and thus resulting in the increase of current.
Thus, the HBT might be used as an LD driver device. The driving methods of the LD are divided into internal driving and external driving according to the position of the HBT. The external driving uses the hybrid IC of the LD and HBT by bonding and wiring, and the internal driving incorporates the LD and HBT in the same chip.
However, external driving has some problems in that the devices might be abnormally operated by the noise due to the parasitic capacitance in the high speed operation, and the cost and the size are increased due to the hybrid process.
Thus, OEIC (Optoelectronic Integrated Circuit) is studied in order to solve such problems by forming the LD and HBT in the same chip.
FIG. 1 is a cross-sectional view of a conventional compound semiconductor. This compound semiconductor is an OEIC composed of a self-aligned HBT and an LD. The compound semiconductor is divided into the HBT region (H-region) and LD region (L-region). Also, a semi-insulating GaAs substrate 1 is used in common.
An N+-type GaAs layer 3 is formed on the GaAs substrate 1, and on the N+-type GaAs layer 3 there are sequentially formed, an N-type AlGaAs layer 5 serving as a collector region, a P+-type GaAs layer 7 serving as a base region, an N-type AlGaAs layer 9 serving as an emitter region, and an N+-type GaAs layer 11 serving as a cap region are sequentially formed.
The N+-type GaAs layer 3 becomes a sub-collector region in the H-region. A T-shaped emitter electrode 17 is formed in a predetermined part of the N+-type GaAs layer 11.
By using this emitter electrode as an implant mask, a P+-region 13 is formed which is overlapped with the N-type AlGaAs layer 5.
A base electrode 18 is formed on the surface of the P+-region 13 and an isolation region 15 is formed at the exposed part of the N+-type GaAs layer 3 by ion-implant of H2.
Also, the N-type AlGaAs layer 5, a P-type or N-type GaAs layer 23 serving as an active layer, a P-type AlGaAs layer 25 serving as a clad region, and a P+-type GaAs layer 26 serving as a cap region are stacked on the LD region (L-region) of the N+-type GaAs layer 3. The N+-type GaAs layer 3 is used as a buffer region.
An insulating layer 28 is formed on the P+-type GaAs layer 26 except for a predetermined part and a high-resistivity region 27 which is overlapped with the N-type AlGaAs layer 5 is formed under the insulating layer 28.
On the insulating layer 28, a P-type electrode 29 is formed in contact with the P+-type GaAs layer 26.
Also, a common electrode 19 serving as a collector electrode of the HBT and an N-type electrode of an LD is formed on the exposed groove 21 in the N+-type GaAs layer 3 between the HBT region (H-region) and the LD region (L-region).
The compound semiconductor device which incorporates both the HBT and the LD in the same chip is used as an OEIC in the optical communication systems. In this OEIC, the LD emits the light, and the HBT amplifies it to simply drive the LD so that the parasitic capacitance is minimized, thereby preventing abnormal operation and obstacles during high speed operation while decreasing the cost and the chip area.
In the conventional compound semiconductor, however, the HBT and the LD are separately formed in each region so that the chip area can be large. Also, the structure is complicated and the topology is bad.